Verum Dezyne · Design by Contract

Formal Design Verification for Concurrent Software

Model concurrent control behaviour explicitly, verify interface and component interactions before software integration, explore counterexamples and generate implementation artefacts from the verified design.

Formal Design Verification for Concurrent Software
MethodDesign by Contract
FocusConcurrent control
VerificationFormal semantics
GenerationC · C++ · C#
Capabilities

Core Capabilities

Capabilities and terminology aligned to the current partner portfolio and target application.

01

Interface Contracts

Define allowed event sequences and interaction rules between components.

02

Component Modelling

Represent state, behaviour and concurrency explicitly in the Dezyne language.

03

Formal Verification

Check supported behavioural properties over the model state space.

04

Counterexample Traces

Inspect traces that explain deadlocks, contract violations or other discovered defects.

05

Graphical Exploration

Use state, sequence and system views to understand architecture and behaviour.

06

Code Generation

Generate C, C++ or C# artefacts for integration into the target application.

Standards & Compliance

Standards and Regulatory Context

Relevant standards, coding guidelines and assurance frameworks for the technology and its application areas.

ISO 26262 workflow context
IEC 61508 workflow context
IEC 62304 workflow context
DO-178C workflow context
EN 50716 workflow context
Industries

Industry Applications

Industry connections are included where the technology addresses a defined engineering, verification or product-security requirement.

Embedded SystemsRelevant application and lifecycle context for Formal Design Verification for Concurrent Software.
Industrial AutomationRelevant application and lifecycle context for Formal Design Verification for Concurrent Software.
AutomotiveRelevant application and lifecycle context for Formal Design Verification for Concurrent Software.
Aerospace & DefenceRelevant application and lifecycle context for Formal Design Verification for Concurrent Software.
RailRelevant application and lifecycle context for Formal Design Verification for Concurrent Software.
Medical DevicesRelevant application and lifecycle context for Formal Design Verification for Concurrent Software.
Integrations & Deployment

Toolchain and Deployment

Connect the technology with the existing engineering environment, lifecycle tools, CI/CD platform and target architecture.

Desktop

Dezyne language, LSP and graphical tools

Automation

Batch-mode verification for CI/CD

Integration

Generated source code with surrounding application and platform software